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lithium ion battery safety monitor ad8280 rev. c information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2010-2011 analog devices, inc. all rights reserved. features wide supply voltage range: 6.0 v to 30.0 v multiple inputs can monitor 3 to 6 cell voltages and 2 temperatures adjustable threshold levels: overvoltage, undervoltage, overtemperature alarm options: separate or shared alarms extended temperature range performance ?40c t a +105c can be daisy-chained internal reference powered from battery stack ldo available to power isolator qualified for automotive applications extensive self-test feature aids in meeting asil/sil requirements applications lithium ion battery backup monitor and threshold detection electric and hybrid electric vehicle industrial vehicle uninterruptible power supply wind and solar general description the ad8280 is a hardware-only safety monitor for lithium ion battery stacks. the part has inputs to monitor six battery cells and two temperature sensors (either ntc or ptc thermistors). the part is designed to be daisy-chained with other ad8280 devices to monitor a stack of significantly more than six cells without the need for numerous isolators. its output can be con- figured for an independent or shared alarm state. the ad8280 functions independently from a primary monitor and contains its own reference and ldo, both of which are powered completely from the battery cell stack. the reference, in conjunction with external resistor dividers, is used to establish trip points for the overvoltages and undervoltages. each cell channel contains programmable deglitching circuitry to prevent alarms from transient input levels. the ad8280 also has two digital pins that can be used to select various combinations of inputs in the case where fewer than six cells are to be monitored. most important, it has a self-test feature, making it suitable for high reliability applications, such as auto- motive hybrid electric vehicles or higher voltage industrial usage, such as uninterruptible power supplies. the ad8280 can function over a temperature range of ?40c to +105c. functional block diagram i/v converter v/i converter vin6 vin5 vin2 vin1 ot uv ov aiinov aioutov vt1 sel0 sel 1 vtop vbot1 c6o ct2 c1o c1u c6u de- glitching de- glitching de- glitching de- glitching de- glitching de- glitching vin3 vin4 ad8280 ct1 vt2 avoutov alarm logic vin0 ldo ref enbo enbi top ref dgt0 dgt1 ot ot ldo testo testi self- test generator bot level shifter level shifter aioutuv aioutot aiinuv aiinot dgt2 nptc alrmsel avoutuv avoutot vcc vccs gnd2 gnd1 v bot1s vbot2 v bot2s fb ldos vtops level shifter 08911-001 figure 1.
ad8280 rev. c | page 2 of 24 table of contents features .............................................................................................. 1 ? applications....................................................................................... 1 ? general description ......................................................................... 1 ? functional block diagram .............................................................. 1 ? revision history ............................................................................... 2 ? specifications..................................................................................... 3 ? absolute maximum ratings............................................................ 5 ? thermal resistance ...................................................................... 5 ? esd caution.................................................................................. 5 ? pin configuration and function descriptions............................. 6 ? typical performance characteristics ............................................. 8 ? theory of operation ...................................................................... 15 ? applications information .............................................................. 16 ? typical connections .................................................................. 16 ? cell inputs ................................................................................... 16 ? temperature inputs and thermistor selection ...................... 16 ? number of cells selection......................................................... 17 ? threshold inputs ........................................................................ 17 ? top and bottom part designation ........................................... 18 ? typical daisy-chain connections ........................................... 18 ? shared or separate alarms........................................................ 18 ? deglitching options................................................................... 18 ? enabling and disabling the ad8280 ....................................... 20 ? alarm output ............................................................................. 20 ? self-test ....................................................................................... 20 ? protection components and pull-up/ pull-down resistors 23 ? emi considerations................................................................... 23 ? system accuracy calculation ................................................... 23 ? outline dimensions ....................................................................... 24 ? ordering guide .......................................................................... 24 ? automotive products ................................................................. 24 ? revision history 7/11rev b to rev. c changes to self-test completion time, t st parameter and self- test va li d ti me, t stv parameter in table 1 .................................... 3 6/11rev. a to rev. b changes to table 1, dynamic performance, self-test va l i d ti me, t stv parameter ................................................................ 4 change to figure 36, figure 37, and figure 39........................... 13 7/10rev. 0 to rev. a change to logic 1 voltage input, v ih parameter in table 1 ........3 changes to temperature inputs and thermistor selection section.............................................................................................. 17 added figure 46; renumbered figures sequentially ................ 17 changes to endnote 1 in table 6.................................................. 18 changes to ordering guide .......................................................... 24 4/10revision 0: initial version
ad8280 rev. c | page 3 of 24 specifications vtop = 7.5 v to 30 v, t a = ?40c to +105c, unless otherwise noted. table 1. parameter test conditions/comments min typ max unit trip point errors undervoltage trip point error ?25 +25 mv overvoltage trip point error ?15 +15 mv overtemperature trip point error ?25 +25 mv hysteresis for overvoltage, undervoltage, and overtemperature trip points 40 50 60 mv cell inputs (vin0 to vin6) input bias current 0 20 na input offset current 0 20 na input voltage range one cell 0 5 v input common-mode range 0 top of stack v temperature inputs (vt1, vt2) input bias current ?10 +10 na input voltage range 0 5 v overvoltage threshold input (ov) input bias current 0 20 na input voltage range 3.6 4.6 v undervoltage threshold input (uv) input bias current 0 20 na input voltage range 1.4 3.3 v overtemperature threshold input (ot) input bias current 0 20 na input voltage range 1.5 4 v input/output characteristics logic 1 current aiinxx, aioutxx 100 150 200 a logic 0 current aiinxx, aioutxx 10 30 50 a logic 1 voltage input, v ih with respect to vbotx all pins except top and bot 2.0 ldo v top and bot pins vtop v logic 0 voltage input, v il with respect to vbotx all pins except top and bot 0.8 v top and bot pins vbot v logic 1 voltage output, v oh with respect to vbotx 4.2 v logic 0 voltage output, v ol with respect to vbotx 0.2 v input bias current sel0, sel1, dgt0, dgt1, dgt2, nptc, alrmsel 1 a reference and ldo reference voltage 4.95 5.0 5.05 v reference source current 250 a ldo voltage 0 ma ldo source current 10.0 ma 4.85 5.1 5.35 v ldo source current 5.0 ma dynamic performance fault detection (deglitch) time range seven settings: 0.0 sec, 0.1 sec, 0.8 sec, 1.6 sec, 3.2 sec, 6.4 sec, and 12.8 sec 0.0 12.8 sec fault detection (deglitch) accuracy ?20 +20 % propagation delay time no capacitor on daisy chain 4.0 s start-up time from application enabled to ldo = 90% of value 3.0 ms
ad8280 rev. c | page 4 of 24 parameter test conditions/comments min typ max unit self-test completion time, t st deglitch time = 0.0 sec 40 50 ms deglitch time > 0.0 sec 800 1000 ms self-test valid time, t stv 0.0 3.5 s delay time for self-test start, t re 10 100 ns delay time for data valid, t fe 4.0 5.0 s rise time for self-test pulse, t r testi 1.0 ms power supply supply voltage range vtop with respect to vbotx ldo source current = 10.0 ma 7.5 30 v ldo source current = 0.0 ma 6.0 30 v quiescent current power supply enabled excluding ldo source current 2.0 ma power supply disabled 1.0 a
ad8280 rev. c | page 5 of 24 absolute maximum ratings table 2. parameter rating vtop to vbotx ?0.3 v to +33 v vin0 to vbotx ?0.3 v to ldo + 0.3 v vin1 through vin6 voltage to vbotx ?0.3 v to vtop + 0.3 v vtx to vbotx ?0.3 v to ldo + 0.3 v testi, enbi to gndx ?0.3 v to ldo + 0.3 v dgtx, selx, nptc to gndx ?0.3 v to ldo + 0.3 v avoutxx to gndx ?0.3 v to ldo + 0.3 v top, bot to vbotx ?0.3 v to vtop + 0.3 v thermal resistance ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 3. thermal resistance package type ja jc unit 48-lead lqfp (st-48) 54 15 c/w esd caution stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ad8280 rev. c | page 6 of 24 pin configuration and fu nction descriptions 3 v bot2s 4 v bot1s 7 vin1 6 vin0 5 vbot1 1 2 vbot2 8 vin2 9 vin3 10 vin4 12 vin6 vtop 11 vin5 gnd1 gnd2 dgt0 alrmsel nptc vcc dgt1 sel0 sel1 avoutuv avoutot avoutov 36 35 34 33 31 30 29 28 27 26 25 32 1413 15 16 17 18 19 20 21 22 23 24 vtops vt1 vt2 testi aioutov aioutuv aioutot enbi ov uv dgt2 ot top bot testo aiinov aiinuv aiinot enbo ref fb ldos vccs ldo 48 47 46 45 44 43 42 41 40 39 38 37 pin 1 ad8280 08911-002 figure 2. pin configuration table 4. pin function descriptions pin no. mnemonic description 1 vbot2 lowest potential of six-cell stack. 2 vbot2s lowest potential of six-cell stack. tie to vbot2. 3 vbot1s lowest potential of six-cell stack. tie to vbot1. 4 vbot1 lowest potential of six-cell stack. 5 vin0 input voltage for bottom of cell 1. 6 vin1 input voltage for bottom of cell 2/top of cell 1. 7 vin2 input voltage for bottom of cell 3/top of cell 2. 8 vin3 input voltage for bottom of cell 4/top of cell 3. 9 vin4 input voltage for bottom of cell 5/top of cell 4. 10 vin5 input voltage for bottom of cell 6/top of cell 5. 11 vin6 input voltage for top of cell 6. 12 vtop highest potential of six-cell stack. 13 vtops highest potential of six-cell stack. tie to vtop. 14 vt1 temperature input 1. 15 vt2 temperature input 2. 16 testi test input. 17 aioutov alarm current output, overvoltag e. used in daisy-chain configuration. 18 aioutuv alarm current output, undervolta ge. used in daisy-chain configuration. 19 aioutot alarm current output, overtempera ture. used in daisy-chain configuration. 20 enbi enable input. when enbi is logic high, the part is enabled; when enbi is logic low, the part is disabled. 21 ov overvoltage trip point. 22 uv undervoltage trip point. 23 ot overtemperature trip point. 24 dgt2 digital select pin 2. used with dgt 0 and dgt1 to select deglitch time (see table 7 ). 25 avoutot alarm voltage output, overtemperature. 26 avoutuv alarm voltage output, undervoltage. 27 avoutov alarm voltage output, overvoltage.
ad8280 rev. c | page 7 of 24 pin no. mnemonic description 28 sel1 digital select pin 1. used with sel0 to select channels to be used (see table 5 ). 29 sel0 digital select pin 0. used with sel1 to select channels to be used (see table 5 ). 30 dgt1 digital select pin 1. used with dgt 0 and dgt2 to select deglitch time (see table 7 ). 31 dgt0 digital select pin 0. used with dgt 1 and dgt2 to select deglitch time (see table 7 ). 32 alrmsel selects three separate alarms or one shared alarm. when alrmsel is logic high, three separate alarms are selected; when alrmsel is logic low, one shared alarm is selected. 33 nptc selects ntc or ptc thermistor for vtx inputs. when nptc is tied to logic high (ldo pin), a ptc thermistor is selected; when nptc is tied to logic low (vbotx pin), an ntc thermistor is selected. 34 gnd2 ground. tie to same pot ential as vbot1 and vbot2. 35 gnd1 ground. tie to same pot ential as vbot1 and vbot2. 36 vcc supply voltage. tie to ldo. 37 vccs supply voltage sense. tie to ldo. 38 ldo ldo output. tie to vcc, vccs, and ldos. 39 ldos ldo output sense. tie to ldo. 40 fb feedback pin. tie to ref. 41 ref reference output. tie to fb. 42 enbo enable output. 43 aiinot alarm current input, overtemperature. used in daisy-chain configuration. 44 aiinuv alarm current input, undervolta ge. used in daisy-chain configuration. 45 aiinov alarm current input, overvoltage. used in daisy-chain configuration. 46 testo test output. 47 bot used to identify part at lowest potential in daisy chain (see table 6 ). 48 top used to identify part at highest potential in daisy chain (see table 6 ).
ad8280 rev. c | page 8 of 24 typical performance characteristics 1800 1200 1500 900 600 300 0 ?30 ?20 ?10 0 10 20 30 08911-003 number of hits trip point error (mv) undervoltage overvoltage sample size = 2726 figure 3. overvoltage and undervoltage trip point error, voltage between vin0 and vin1 1600 1200 1400 800 600 400 0 ?30 ?20 ?10 0 10 20 30 08911-004 number of hits trip point error (mv) 200 1000 undervoltage overvoltage sample size = 2726 figure 4. overvoltage and undervoltage trip point error, voltage between vin1 and vin2 1800 1200 1500 900 600 300 0 ?30 ?20 ?10 0 10 20 30 08911-005 number of hits trip point error (mv) undervoltage overvoltage sample size = 2726 figure 5. overvoltage and undervoltage trip point error, voltage between vin2 and vin3 1200 1400 800 600 400 0 ?30 ?20 ?10 0 10 20 30 08911-006 number of hits trip point error (mv) 200 1000 undervoltage overvoltage sample size = 2726 figure 6. overvoltage and undervoltage trip point error, voltage between vin3 and vin4 1800 2100 2400 1200 900 600 0 ?30 ?20 ?10 0 10 20 30 number of hits trip point error (mv) 300 1500 undervoltage overvoltage 08911-007 sample size = 2726 figure 7. overvoltage and undervoltage trip point error, voltage between vin4 and vin5 1800 1200 1500 900 600 300 0 ?30 ?20 ?10 0 10 20 30 08911-008 number of hits trip point error (mv) undervoltage overvoltage sample size = 2726 figure 8. overvoltage and undervoltage trip point error, voltage between vin5 and vin6
ad8280 rev. c | page 9 of 24 250 150 200 100 50 0 ?5 ?4 ?3 ?2 ?1 0 08911-009 number of hits trip point error (mv) sample size = 2726 figure 9. overtemperature trip point error 240 120 150 180 210 60 90 30 0 47 48 49 50 51 08911-010 number of hits hysteresis (mv) sample size = 2726 figure 10. overvoltage, undervoltage, and overtemperature hysteresis 400 500 200 300 100 0 4.94 4.96 4.98 5.02 5.00 5.04 5.06 08911-011 number of hits reference voltage (v) sample size = 2726 figure 11. reference voltage 120 180 150 60 90 30 0 4.8 4.9 5.0 5.2 5.1 5.3 5.4 08911-012 number of hits ldo voltage (v) sample size = 2726 figure 12. ldo voltage 200 400 100 150 50 0 1.2 1.3 08911-113 number of hits supply current (ma) 250 350 300 1.4 1.5 1.6 1.7 1.8 1.9 sample size = 2726 figure 13. supply current 200 600 100 0 ?0.02 ?0.01 08911-114 number of hits shutdown current (a) 300 500 400 0 0.01 0.02 0.03 0.04 0.05 sample size = 2726 figure 14. supply current, power-down mode
ad8280 rev. c | page 10 of 24 ?25 ?20 ?15 ?10 ?5 0 5 10 15 20 25 ?50 ?30 ?10 10 30 50 70 90 110 overvoltage error (mv) temperature (c) vin0 and vin1 voltage between vin1 and vin2 vin2 and vin3 vin1 to vin2 and vin5 to vin6 vin3 and vin4 vin4 and vin5 vin5 and vin6 08911-013 figure 15. overvoltage error vs. temperature ?25 ?20 ?15 ?10 ?5 0 5 10 15 20 25 ?50 ?30 ?10 10 30 50 70 90 110 undervol t age error (mv) temperature (c) vin2 to vin3 and vin3 to vin4 08911-014 vin0 and vin1 voltage between vin1 and vin2 vin2 and vin3 vin3 and vin4 vin4 and vin5 vin5 and vin6 figure 16. undervoltage error vs. temperature ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 10 ?50 ?30 ?10 10 30 50 70 90 110 overtemper a ture error (mv) temperature (c) vt1 vt2 08911-015 figure 17. overtemperature error vs. temperature 25 30 35 40 45 50 55 60 65 70 75 ?50 ?30 ?10 10 30 50 70 90 110 overvoltage hysteresis (mv) temperature (c) 08911-016 vin0 and vin1 voltage between vin1 and vin2 vin2 and vin3 vin3 and vin4 vin4 and vin5 vin5 and vin6 figure 18. overvoltage hy steresis vs. temperature 25 30 35 40 45 50 55 60 65 70 75 ?50 ?30 ?10 10 30 50 70 90 110 undervoltage hysteresis (mv) temperature (c) 08911-017 vin0 and vin1 voltage between vin1 and vin2 vin2 and vin3 vin3 and vin4 vin4 and vin5 vin5 and vin6 figure 19. undervoltage hysteresis vs. temperature 25 30 35 40 45 50 55 60 65 70 75 ?50 ?30 ?10 10 30 50 70 90 110 overtemper a ture hysteresis (mv) temperature (c) vt1 vt2 08911-018 figure 20. overtemperature hysteresis vs. temperature
ad8280 rev. c | page 11 of 24 ?15 ?10 ?5 0 5 10 15 6 101418222630 trip point error (mv) stack voltage (v) 08911-019 voltage between vin1 and vin2 vin2 and vin3 vin3 and vin4 vin4 and vin5 vin5 and vin6 vin0 and vin1 figure 21. overvoltage trip point error vs. stack voltage (vin6 C vin0) ?25 ?20 ?15 ?10 ?5 0 5 trip point error (mv) stack voltage (v) 6 101418222630 0 8911-020 vin0 and vin1 voltage between vin1 and vin2 vin2 and vin3 vin3 and vin4 vin4 and vin5 vin5 and vin6 figure 22. undervoltage trip point error vs. stack voltage (vin6 C vin0) ?2 0 2 4 6 8 10 6 101418222630 bias current (na) stack voltage (v) 08911-123 figure 23. input bias current vs. stack voltage (vin6 C vin0) 0 0.5 1.0 1.5 2.0 2.5 6 101418222630 enabled supply current (ma) 0 0.5 1.0 1.5 2.0 2.5 disabled supply current (a) stack voltage (v) enabled disabled 08911-022 figure 24. supply current vs. stack voltage (vin6 C vin0) 1.15 1.20 1.25 1.30 1.35 1.40 ?50 ?30 ?10 10 30 temperature (c) 50 70 90 110 stack voltage = 7.5v stack voltage = 18v stack voltage = 29.8v 08911-023 supply current (ma) figure 25. enabled supply current vs. temperature for various stack voltages (vin6 C vin0) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0 5 10 15 20 25 30 vol t age (v) source current (ma) ldo ref 08911-029 figure 26. ldo and reference voltage vs. ldo source current, stack voltage = 7.5 v
ad8280 rev. c | page 12 of 24 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0 5 10 15 20 25 30 voltage (v) source current (ma) ldo ref 08911-030 figure 27. ldo and reference voltage vs. ldo source current, stack voltage = 18.0 v 0 5 10 15 20 25 30 35 ?50 ?30 ?10 10 30 50 70 90 110 source current (ma) temperature (c) ldo ref 08911-031 figure 28. ldo and reference source current vs. temperature 4.95 4.97 4.99 5.01 5.03 5.05 5.07 5.09 5.11 ?50 ?30 ?10 10 30 50 70 90 110 voltage (v) temperature (c) ldo ref 08911-032 figure 29. ldo and reference voltage vs. temperature 4.98 4.99 5.00 5.01 5.02 5.03 5.04 5.05 5.06 5.07 5.08 6 101418222630 voltage (v) stack voltage (v) ldo ref 08911-033 figure 30. ldo and reference voltage vs. stack voltage (vin6 C vin0) ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 10 ?50 ?30 ?10 10 30 50 70 90 110 bias current (na) temperature (c) vin0 vin1 vin2 vin3 vin4 vin5 vin6 vt2 vt1 ov uv ot 08911-034 figure 31. input bias current vs. temperature 1 ov 08911-035 5v/di v 20ns/div figure 32. alarm rise time
ad8280 rev. c | page 13 of 24 1 ov 08911-036 5v/di v 20ns/div figure 33. alarm fall time 5v/di v 20ms/div 4 1 2 3 ov uv ot testi 08911-024 figure 34. testi and avoutxx, deglit ch time = 0.0 sec, self-test passes 4 1 2 3 ov uv ot testi 08911-025 5v/di v 20ms/div figure 35. testi and avoutxx, deglitch time = 0.0 sec, self-test fails (uv) 3 1 2 4 ov uv ot testi ch1 ch3 5v 5v ch2 ch4 5v 5v m200ms 1.25ks/s a ch4 2.4v 800s/pt 08911-048 figure 36. testi and avoutxx, deglit ch time = 0.1 sec, self-test passes 3 1 2 4 ch1 ch3 5v 5v ch2 ch4 5v 5v m200ms 1.25ks/s a ch4 2.4v 800s/pt 08911-049 ov uv ot testi figure 37. testi and avoutxx, deglitch time = 0.1 sec, self-test fails (uv) 1 2 ov testi 08911-038 5v/di v 4s/div figure 38. testi edge and avoutxx, self-test fails (enlarged)
ad8280 rev. c | page 14 of 24 3 1 2 ch1 ch3 5v 5v ch2 ch4 5v 5v m400ms 625s/s a ch4 2.4v 1.6ms/pt 08911-050 4 ov uv ot testi figure 39. alarm condition entering self-test, part passes self-test 08911-143 4 1 2 3 testi ov uv ot 4s/div 5v/di v figure 40. alarm condition entering self-test, part passes self-test (enlarged) 4 1 2 3 enbi ov ref testi 08911-028 5v/di v 1ms/div figure 41. start-up time 2 1 ov cell 08911-139 5v/di v 200ms/div alarm tripped figure 42. cell voltage change to trip alarm, deglitch time = 800 ms 2 1 ov cell 08911-140 5v/di v 1sec/div alarm tripped figure 43. cell voltage change to trip alarm, deglitch time = 3.2 sec
ad8280 rev. c | page 15 of 24 theory of operation figure 44 shows a block diagram of the ad8280. the ad8280 is a threshold monitor that can be used to monitor up to six cell voltages and two temperature voltag es. the part can also be used in a daisy-chain configuration to monitor as many cells as required. the benefit of the daisy-chain configuration is that isolation is required to bring the alarm signal away from the high voltage environment on only the bottom part of the chain, reducing system cost and minimizing the board space required. the cell and temperature voltage inputs are connected to the part using the vin0 through vin6 inputs and the vt1 and vt2 inputs, respectively. because the six-cell stack voltage can be up to 30 v, the input voltages are level-shifted and referenced to the lowest potential (part ground or vbotx) of the ad8280. these voltages are then input into window comparators and compared to trip points set by external resistor dividers. if the cell or temperature voltage inputs exceed or fall below the selected trip points, an alarm, in the form of a digital voltage level, changes state at the voltage output (avoutxx) of the part. the alarm state also exists in the form of a current output (aioutxx) used to communicate to the other devices when multiple parts are used in a daisy-chain configuration. the part contains programmable deglitching circuitry to ensure that transient voltages appearing at the cell inputs are ignored. the part also contains its own ldo and reference. the ldo can be used to drive external components such as thermistors or isolators, whereas the reference can be used with the voltage dividers to establish the trip points. the ad8280 has the following unique features and capabilities: ? three, four, five, or six cells can be monitored. ? negative or positive temperature coefficient thermistors can be used. ? multiple parts can be configured in a daisy chain to monitor hundreds of cells. information about the status of the alarms on the entire daisy chain, as well as input signals that enable the part and initiate self-test, are all communicated via the bottom, or master, part in the chain. ? alarm outputs for overvoltage, undervoltage, and overtemp- erature status can be shared, with each output indicating the same status for any of the occurring alarm conditions, or the alarm outputs can function as separate entities with each indicating the status of the specific condition. ? an extensive self-test feature ensures that the internal components are functioning correctly. the self-test is initiated upon request to the testi pin. 08911-039 i/v converter v/i converter vin6 vin5 vin2 vin1 ot uv ov aiinov aioutov vt1 sel0 sel 1 vtop vbot1 c6o ct2 c1o c1u c6u de- glitching de- glitching de- glitching de- glitching de- glitching de- glitching vin3 vin4 ad8280 ct1 vt2 avoutov alarm logic vin0 ldo ref enbo enbi top ref dgt0 dgt1 ot ot ldo testo testi self- test generator bot level shifter level shifter aioutuv aioutot aiinuv aiinot dgt2 nptc alrmsel avoutuv avoutot vcc vccs gnd2 gnd1 v bot1s vbot2 v bot2s fb ldos vtops level shifter figure 44. functional block diagram
ad8280 rev. c | page 16 of 24 applications information typical connections figure 45 is a block diagram of the ad8280 typical connections. cell inputs the battery stack of six cells should be connected to vin0 through vin6, with the highest potential connected to vin6 and the lowest to vin0. the connections should be made through a low-pass filter consisting of a 10 k resistor and a 10 nf capacitor, as shown in figure 45 . the lowest potential of the six-cell stack should also be connected to vbot1, vbot1s, vbot2, and vbot2s as well, whereas the highest potential should be connected through a diode to vtop and vtops. it is recommended that decoupling capacitors of 0.1 f and 10 f be used at the vtop pin. temperature inputs and thermistor selection vt1 and vt2 are voltage inputs and are designed to work with thermistors that are configured as resistor dividers, as shown in figure 45 . the voltage at the top of the thermistor divider should be the +5 v output of the ldo. the ldo pin can source more current than the ref pin and is better suited to drive the thermistor dividers. if a voltage source other than that of the ad8280 ldo is used to drive the thermistor bridge (v th ), it is important that the vt1 and vt2 voltages be brought to 0 v when the ad8280 is disabled or powered down because the vt1 and vt2 inputs must be at 0 v when the ldo is also at 0 v. vbot1 vtop uv ov ot enbi ad8280 vcc ref uv ref ov ref ot ref vt2 10k ? fb vbot1s vtops 2.2f 10nf sel0 vccs 0.1f sel1 vin6 vin5 vin4 vin3 vin2 vin1 vin0 vt1 vbot2 vbot2s enbo ldo ldos testo testi aioutov aioutuv aioutot aiinov aiinuv aiinot avoutov avoutuv avoutot dgt2 nptc gnd1 gnd2 top bot alrmsel dgt0 dgt1 100nf z1 0.1f 0.1f 10f part ground part ground notes 1. part is configured as follows: middle part in daisy chain alarms are shared deglitch time set to 0.0 seconds ntc thermistor inputs 6 cell inputs 22pf + + + + + + 08911-040 figure 45. typical connections of the ad8280
ad8280 rev. c | page 17 of 24 also, if the resistor (r top ) used in the top of the thermistor bridge circuit is less than 10 k, another resistor (r in ) must be added in series to the input to the vtx pin (see figure 46 ). the two resistors together must be greater than 10 k (r top + r in > 10 k). this configuration is required only if v th is not the ad8280 ldo. r top t hermistor ad8280 vtx r in v th 08911-047 figure 46. input configuration for vtx when not using the ldo for v th the part can work with both negative temperature coefficient (ntc) and positive temperature coefficient (ptc) thermistors. for ntc, the nptc pin should be tied to logic low (vbotx pin); for ptc, the nptc pin should be tied to logic high (ldo pin). if the part is set to ntc mode, the ot alarm is tripped when the voltages at vt1 and vt2 drop below the trip point. if the part is set to ptc mode, the ot alarm is tripped when the voltages at vt1 and vt2 rise above the trip point. number of cells selection the part can be configured to work with three, four, five, or six cells. table 5 describes how to program the sel0 and sel1 pins to determine the number of cells being monitored. a logic low represents vbotx, and a logic high represents the ldo output voltage. figure 47 through figure 49 show how to connect the cells to the part in a five-cell, four-cell, or three-cell application. table 5. selx pin programming number of cells used sel0 sel1 6 cells 0 0 5 cells (vin5 shorted) 0 1 4 cells (vin4 and vin5 shorted) 1 0 3 cells (vin3, vin4, and vin5 shorted) 1 1 vin6 vin5 vin4 vin3 vin2 vin1 vin0 ad8280 08911-041 + + + + + figure 47. five-cell connections for the ad8280 vin6 vin5 vin4 vin3 vin2 vin1 vin0 ad8280 08911-042 + + + + figure 48. four-cell connections for the ad8280 vin6 vin5 vin4 vin3 vin2 vin1 vin0 ad8280 08911-043 + + + figure 49. three-cell connections for the ad8280 threshold inputs the thresholds (or trip points) are set externally with a voltage divider providing maximum flexibility. the desired trip point voltage is connected to the following pins: ov (overvoltage trip point), uv (undervoltage trip point), and ot (overtemperature trip point). the +5 v output of either the reference (ref) or the ldo can be used as the top voltage of the divider. however, because the reference output is more accurate than the ldo out- put, the reference output is better suited to power the trip point setting dividers. if the thermistor dividers used for temperature sensing are driven from the ldo output, it is recommended that the ldo be used to drive the ot trip point divider as well for better temperature drift performance. decoupling capacitors (0.1 f) should be used with the bottom leg of each divider in addition to a 2.2 f capacitor at the ref output, as shown in figure 45 . the ref pin should be loaded with no more than 25 k of resistance. therefore, when using ref to drive three voltage dividers (ov, uv, and ot), it is recommended that the resis- tance of each divider total at least 75 k. if driving only two dividers (ov and uv) with the reference, each divider should total no less than 50 k.
ad8280 rev. c | page 18 of 24 top and bottom part designation when configured in a daisy chain, the ad8280 operates differ- ently, depending on where it is in the chain: top part (highest potential), middle part, or bottom part (lowest potential). the top and bot pins are used to designate the location of each part in the daisy chain. table 6 is the logic table for identifying the location of the part in the daisy chain or, when not used in a daisy chain, identifying it as a single (standalone) part. the logic high and logic low for the top and bot pins are different from those of the other logic pins of the ad8280. the top and bot pins are referenced to vtop (logic high) and vbotx (logic low), respectively. table 6. designation of the ad8280 in daisy-chain and standalone configurations desired condition top 1 bot 1 middle part (middle potential part) 0 0 bottom part (lowest potential part) 0 1 top part (highest potential part) 1 0 single part (highest and lowest potential part) 1 1 1 for the top and bot pins only, logi c 1 is vtop and logic 0 is vbotx. bottom part in daisy-chain configuration the bottom part in a daisy-chain configuration is the master part and accepts voltage inputs into the enbi and testi pins. the aiinov, aiinuv, and aiinot pins of the bottom part are connected to the aioutov, aioutuv, and aioutot pins, respectively, of the next higher potential part in the daisy chain. the aioutov, aioutuv, and aioutot pins of the bottom part can be left floating , or they can be tied to part ground (vbotx). middle part in daisy-chain configuration when the ad8280 is designated as a middle part, the aiinov, aiinuv, aiinot, enbo, and testo pins are connected to the aioutov, aioutuv, aioutot, enbi, and testi pins, respectively, of the ad8280 above it. top part in daisy-chain configuration when the ad8280 is designated as a top part, the aiinov, aiinuv, aiinot, enbo, and testo pins can be left floating, or they can be tied to vtop. standalone part when the ad8280 is designated as a single part (used as a stand- alone part), the aioutov, aioutuv, and aioutot pins can be left floating, or they can be tied to part ground (vbotx). the aiinov, aiinuv, aiinot, enbo, and testo pins can be left floating or tied to vtop. the ad8280 accepts voltage inputs into the enbi and testi pins. alarm signals in daisy-chain configuration regardless of the part designation, the alarm signals are available as voltage outputs on any part in the chain on the avoutov, avoutuv, and avoutot pins. these signals indicate the status of the part where the voltage alarms are monitored, as well as the status of the parts above it in the daisy chain. make sure to use isolators to bring those signals outside the high voltage battery environment. typical daisy-chain connections figure 50 shows the typical connections for configuring the part in a daisy chain. shared or separate alarms the ad8280 can be configured for three separate alarms or for one shared alarm. tying the alrmsel pin to a 5 v logic high forces the part into separate alarm mode. in this mode, each alarm trips only for its designated monitoring function. that is, the ov alarm trips only if an overvoltage condition exists at any of the cell inputs, the uv alarm trips only if an undervoltage condition exists at any of the cell inputs, and the ot alarm trips only if an overtemperature condition exists at either of the temperature inputs. in shared alarm mode, any of the three conditionsovervoltage, undervoltage, or overtemperaturetrips the alarm on all three signal chains. in shared mode, it is necessary to monitor only one alarm because all three contain the same signal. deglitching options the deglitching circuitry is available so that the part is immune to transients occurring at the cell inputs. if a transient voltage of a high or low enough level to trip an alarm occurs at the input to the part, the alarm state does not occur if the transient voltage is present for less than the selected deglitch time. the dgt0, dgt1, and dgt2 pins are used to establish the deglitch time. table 7 shows the options available and the corresponding logic levels to use when setting the deglitch time with the dgt0, dgt1, and dgt2 pins. table 7. fault detection time pin programming deglitch time dgt0 dgt1 dgt2 0.0 sec 0 0 0 0.1 sec 0 0 1 0.8 sec 0 1 0 1.6 sec 0 1 1 3.2 sec 1 0 0 6.4 sec 1 0 1 12.8 sec 1 1 0 do not tie all three deglitching pins (dgt0, dgt1, and dgt2) to logic high (111); this setting is used only during the testing of the part at the factory. setting the deglitch time to 0.0 sec (000) allows the use of an external deglitching circuit, if desired. additionally, when the deglitch time is set to 0.0 sec, the time required to ensure that the part has completed its self-test is significantly reduced (see the self-test section). the dgtx pins should be tied to a fixed logic level and not toggled or changed during operation of the ad8280.
ad8280 rev. c | page 19 of 24 vin6 vin5 vin4 vin3 vin2 vin1 vin0 vt1 vbotx vtopx uv ov aiinxx ot aioutxx ad8280 ad8280 ad8280 avoutxx dgt0 uv ref ov ref ot ref uv ref ov ref ot ref uv ref ov ref ot ref ref/fb vt2 enbo enbi enbi sel0 sel1 10k? 10k ? 10f 0.1f ldox testi dgt1 top bot testo vout enbi test ntc t1/t2 t1 t2 t3/t4 t5/t6 10nf 2.2f 100nf 1.0f alrmsel/ dgt2/ nptc vccx gndx vin6 vin5 vin4 vin3 vin2 vin1 vin0 vt1 vbotx vtopx uv ov aiinxx ot aioutxx avoutxx dgt0 ref/fb vt2 enbo sel0 sel1 ldox testi dgt1 top bot testo alrmsel/ dgt2/ nptc vccx gndx vin6 vin5 vin4 vin3 vin2 vin1 vin0 vt1 vbotx vtopx uv ov aiinxx ot aioutxx avoutxx dgt0 ref/fb vt2 enbo enbi sel0 sel1 ldox testi dgt1 top bot testo alrmsel/ dgt2/ nptc vccx gndx 100nf 22pf t5 t4 t6 t3 08911-044 + + + + + + + + + + + + + + + + + + figure 50. typical daisy-chain connections
ad8280 rev. c | page 20 of 24 enabling and disabling the ad8280 the ad8280 can be disabled or put into a standby mode by bringing the enbi pin to logic low, lowering the quiescent current of the ad8280 from a maximum of 2.0 ma to 1.0 a and dropping the ldo and reference output to 0 v. bringing the enbi pin to a logic high takes the part out of standby mode and enables it. when the ad8280 is used in a daisy-chain configuration, the enable/disable signal is a voltage logic level that is sent to the part designated as the bottom part (the bottom part monitors the lowest voltage cells). the bottom part transfers the enable/ disable signal up the daisy chain via a current out of the enbo pin and into the enbi pin of the next higher part in the daisy chain. all the parts in the daisy chain are enabled by sending a logic high to the enbi pin of the bottom, or master, part. all the parts in the daisy chain are disabled by sending a logic low to the enbi pin of the bottom part. alarm output the alarm status of the ad8280 appears as a voltage logic level at the avoutov, avoutuv, and avoutot pins. when the ad8280 is in a daisy-chain configuration, the alarm status is passed from the aioutxx pins of one part to the aiinxx pins of the next lower potential part in the daisy chain. figure 51 shows the output state when the part is in an unalarmed (logic low) or alarmed (logic high) state. if the ad8280 is configured for the shared alarm mode, the status of all three voltage output pins (avoutxx) is the same. in shared alarm mode, the unused pins can be left floating, they can be tied to ground through a high resistance to limit the current draw, or they can be tied together. self-test the ad8280 has the unique capability of extensively testing its internal components to ensure that they are functioning correctly. this feature is very important to the designer who is concerned with meeting the difficult safety integrity level guide- lines of iec 61508 or iso 26262. the part produces internal fault conditions and compares the results to what is expected. the status of the alarm signals is interrupted during the self-test, and the pass/fail status of the self-test is communicated via the alarm status signal pins (avoutxx and aioutxx). because the ad8280 uses an internal reference to perform its self-test, the self-test detects open circuits and short circuits at the threshold pins, as well. see figure 51 for a timing diagram and figure 52 for timing definitions related to the self-test feature. to initiate a self-test, the testi pin is prompted with a rising edge from a 5 v logic level pulse (test pulse). the pulse applied at testi must stay high for a minimum time (t st min). follow- ing the rising edge of the pulse to initiate the self-test, the alarm status for any avoutxx or aioutxx pin goes into a logic high status while the part performs its internal self-test. after sufficient time to perform the test has elapsed and assuming that the part passes self-test, the alarm status reverts to the unalarmed state, a logic low. if the part fails self-test, the alarm remains in a logic high state when the falling edge of the test pulse applied at testi occurs. the minimum t st is dependent on the status of the dgtx pins. if all three dgtx pins are tied to a logic low, the self-test ignores the deglitch function of the part and completes the self-test in a shorter time (50 ms max). when at least one dgtx pin is set to logic high, the ad8280 defaults to the minimum deglitch time of 100 ms during the self-test. because the self-test includes multiple layers and passes, this minimum time is specified as 700 ms. therefore, if a faster self-test is required, the user should set the internal deglitch time to 0.0 sec and use an external deglitch circuit if deglitch is required. self-test in daisy-chain configuration the self-test can also be used when multiple ad8280 parts are configured in a daisy chain. the test pulse is applied to the testi pin of the bottom part as a voltage and then travels up the chain as a current. the self-test for each part is started as soon as the part sees the rising edge of the test pulse, virtually simultaneously. when the highest part in the chain passes its self-test, it sends that information to the next lower part in the daisy chain. even if that part has already completed its self-test, it cannot pass its own result on to the next part in the daisy chain until it receives the pass signal from the part above it. this process continues with each part lower down the chain. therefore, when a pass signal appears at the bottom part in the daisy chain, it indicates that every part in the daisy chain passed the self-test. if any part in the chain fails the self-test, the part below the failing part never receives a pass signal, and, subse- quently, the bottom part never receives a pass signal either. therefore, regardless of whether the bottom part passes self-test, the avoutxx signals at the bottom part never change state from the logic high that occurred when the self-test was initiated, and the user will know that there is a failed part in the chain.
ad8280 rev. c | page 21 of 24 testi a ioutxx/avoutxx test ok a ioutxx/avoutxx test fails a ioutxx/avoutxx alarmed test ok normal operation during self-test mode unalarmed a ioutxx/avoutxx alarmed a ioutxx/avoutxx low at falling edge of testi: part passes self-test high at falling edge of testi: part fails self-test 08911-045 figure 51. timing diagram for alarms at aioutxx and avoutxx self-test and alarm conditions if an alarm occurs just prior to or just after the self-test pulse is initiated, the alarm causes the self-test to fail. the time span for this condition depends on the deglitch time. ? deglitch time = 0.0 sec. the part fails self-test if an alarm occurs in the time period from 20 ms before the leading edge of the self-test pulse to 20 ms after the leading edge of the self-test pulse. ? deglitch time > 0.0 sec. the part fails self-test if an alarm occurs in the time period from 120 ms before the leading edge of the self-test pulse to 120 ms after the leading edge of the self-test pulse. therefore, in the unusual circumstance that the part fails self- test and there is an alarm condition state after the self-test, it is recommended that the user retest the part to ensure that an alarm did not occur just prior to or just after initiating the self-test. the self-test works when the part is in the shared alarm mode or in the separate alarm mode. when the part is in the separate alarm mode, the self-test status on an output pertains only to that portion of the internal circuit relevant to the condition being monitored: overvoltage, undervoltage, or overtemperature. self-test timing and monitoring strategy when monitoring the signals for self-test on the ad8280, note the following items: ? after initiating a self-test of the ad8280 with a rising edge on the testi pin, the alarm appearing at the avoutxx pin remains valid up to t re max. ? when the rising edge of the testi pulse occurs, the user should monitor the avoutxx pin to make sure that it is in the high state after the t re max time has elapsed. ? after the t st max time has elapsed, the user can verify that the avoutxx pin has changed to the low state, indicating that the part or parts passed the self-test. the user must also ensure that the minimum length of the testi pulse is greater than t st max. the status of the self-test on the avoutxx pin is valid until t stv min after the trailing edge of the testi pulse. ? the alarm state is valid again t fe max after the trailing edge of the pulse.
ad8280 rev. c | page 22 of 24 0 1 0 1 0 1 0 1 0 1 0 1 testi testi avoutxx self-test pass avoutxx self-test fail avoutxx self-test pass avoutxx self-test fail notes 1. t re is the time from the rising edge of the test pulse (testi) to the start of the self-test. 2. t st is the time from the rising edge of the test pulse until the part completes its self-test (test pulse must be longer than t st max). 3. t stv is the time from the falling edge of the test pulse that the self-test indication remains valid (low = pass, high = fail). 4. t fe is the time from the falling edge of the test pulse until the self-test data is cleared and the alarm data is again valid. no alarm when self-test is initiated alarm when self-test is initiated t fe t stv t re t st t fe t stv t re t st 08911-046 figure 52. timi ng definitions
ad8280 rev. c | page 23 of 24 protection components and pull-up/ pull-down resistors as shown in figure 45 , several devices are added to provide protection in a high voltage environment. zener diode z1 ensures that the six-cell stack voltage does not significantly exceed the maximum 30 v across the part. it is recommended that a 33 v rated zener diode be used for z1. the user can also use diodes in the daisy-chain lines (anode to cathode from higher potential to lower potential) to protect the parts in the event that an open circuit appears on the battery connections, causing a high reverse voltage across the ad8280 (these diodes are not shown in figure 45 ). the diodes should have a reverse voltage rating comparable to the highest voltage of the battery system. if diodes are used in the daisy chain, it is also recommended that a diode be used between the top cell in the stack (anode) and vtop (cathode) of the top part, as well as between vbotx (anode) of each part and vtop (cathode) of the next lowest potential part in the daisy chain. because there are no pull-up or pull-down resistors internal to the part, the user may want to pull down the testi pin of the bottom part through a 10 k resistor to vbotx (part ground). the addition of this resistor ensures that the part is not locked in self-test mode if the line opens. also, the user may want to pull up the enbi pin on the bottom part of a daisy chain so that if the line opens, the chain stays in the enabled (powered up) mode. emi considerations to increase immunity to electromagnetic interference (emi), use the following components and layout schemes (see figure 50 ). ? use a 22 pf capacitor on each of the daisy-chain lines. ? route the daisy-chain lines on an inner pcb layer. ? use ground planes (connected to vbotx from the higher potential part) both over and under the daisy-chain lines to shield them. ? route the connections from vbotx to vtop to best ensure a low impedance connection between them. ? use ferrite beads on the vtop lines as shown in figure 50 . ? use 100 nf capacitors across each of the six-cell battery stacks. ? place the ad8280 parts as close together as possible on the board to minimize the length of the daisy-chain lines. system accuracy calculation when calculating system accuracy, there are four error sources to consider: ? trip point error (see table 1 ) ? reference voltage error (see table 1 ) ? resistor tolerance ? resistor temperature coefficient sample calculation following is a sample calculation for overvoltage accuracy. in this calculation, the following conditions are assumed: ? resistors used in the external resistor divider to set the trip points are 1%, 100 ppm/c resistors. ? temperature range is ?40c to +85c. ? desired overvoltage trip point is 4.0 v (resistor values selected should be 15 k and 60 k). the resulting sources of error are described in this section. maximum trip point error the maximum trip point error is 15 mv. maximum reference error the maximum reference error is as follows: (60/(60 + 15)) 50 mv = 40 mv maximum resistor tolerance error the maximum resistor tolerance error depends on the values of the resistors. if one resistor is high and the other is low, the worst-case error is as follows: (60.6/(60.6 + 14.85)) 5.00 v = 4.016 v (error of +16 mv) (59.4/(59.4 + 15.15)) 5.00 v = 3.984 v (error of ?16 mv) in this sample calculation, the maximum resistor tolerance error is 16 mv. maximum temperature coefficient error if one resistor drifts high and the other resistor drifts low, the worst-case error is as follows: 60 k + (100 ppm/c (25c ? (?40c)) 60 k) = 60.39 k 15 k ? (100 ppm/c (25c ? (?40c)) 15 k) = 14.9 k (60.39/(60.39 + 14.90)) 5.00 v = 4.010 v (error of +10 mv) or 60 k ? (100 ppm/c (25c ? (?40c)) 60 k) = 59.61 k 15 k + (100 ppm/c (25c ? (?40c)) 15 k) = 15.1 k (59.61/(59.61 + 15.10)) 5.00 v = 3.990 v (error of ?10 mv) in this sample calculation, the maximum temperature coefficient error is 10 mv. total system accuracy the system accuracy, or the sum of all the errors, is 81 mv. if the resistor pair coefficients are matched so that drift is in the same direction, that portion of the error can be ignored, and the total system accuracy would be 71 mv.
ad8280 rev. c | page 24 of 24 outline dimensions compliant to jedec standards ms-026-bbc top view (pins down) 1 12 13 25 24 36 37 48 0.27 0.22 0.17 0.50 bsc lead pitch 1.60 max 0.75 0.60 0.45 view a pin 1 0.20 0.09 1.45 1.40 1.35 0.08 coplanarity view a rotated 90 ccw seating plane 7 3.5 0 0.15 0.05 9.20 9.00 sq 8.80 7.20 7.00 sq 6.80 051706-a figure 53. 48-lead low profile quad flat package [lqfp] (st-48) dimensions shown in millimeters ordering guide model 1 , 2 temperature range package description package option ad8280wastz ?40c to +105c 48-lead lqfp st-48 ad8280wastz-rl ?40c to +105c 48-lead lqfp st-48 AD8280-EVALZ evaluation board with two ad8280wastz devices 1 z = rohs compliant part. 2 w = qualified for auto motive applications. automotive products the ad8280w models are available with controlled manufacturing to support the quality and reliability requirements of automotiv e applications. note that these automotive models may have specifications that differ from the commercial models; therefore, desi gners should review the specifications section of this data sheet carefully. only the automotive grade products shown are available for use in automotive applications. contact your local analog devices account representative for specific product ordering information and to obtain the specific automotive reliability reports for these models. ?2010-2011 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d08911-0-7/11(c)

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